Small geometries have projected IC technology into an era where test has become a crucial part in the chip design process and have introduced new challenges needing solutions that use already ...

Embedded test compression is a standard technique for dramatically reducing the test data volume and test time on the automatic test equipment. Companies typically aim for 60x to 100x compression for ...

To compensate, test engineers use top-up patterns that bypass test compression logic. This restores the test coverage but reduces the compression of the overall pattern set. As a result, the presence ...